학술논문

Recursive Implementation of Voting Networks
Document Type
Conference
Source
2024 IEEE 14th Annual Computing and Communication Workshop and Conference (CCWC) Computing and Communication Workshop and Conference (CCWC), 2024 IEEE 14th Annual. :0351-0356 Jan, 2024
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Costs
Systematics
Design methodology
Logic gates
Delays
Power dissipation
Transistors
Majority gate
nanoelectronics
parallel counter
threshold circuit
VLSI-friendly design
voter
weight checker
Language
Abstract
Recursive synthesis of digital circuits leads to systematic design methods, reuse of building blocks, and clean mathematical models for circuit cost and delay. Recursive integer and matrix multiplications, and Fourier transform, are familiar examples. In this paper, we show that threshold voters, including the important special case of majority voters, can be synthesized from smaller networks of the same kind in a simple and easily analyzable way. At the end of the recursion, we get to readily-available AND & OR gates, 3-input counters (or full-adders), and majority circuits, which are realizable in a variety of platforms, including emerging atomic-scale digital technologies.