학술논문

A Comprehensive Survey on Delaunay Triangulation: Applications, Algorithms, and Implementations Over CPUs, GPUs, and FPGAs
Document Type
Periodical
Source
IEEE Access Access, IEEE. 12:12562-12585 2024
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Fields, Waves and Electromagnetics
General Topics for Engineers
Geoscience
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Transportation
Graphics processing units
Field programmable gate arrays
Three-dimensional displays
Surveys
Central Processing Unit
Geographic information systems
Electrical engineering
Delaunay triangulation
applications of Delaunay triangulation
algorithmic approaches to Delaunay triangulation
CPU implementation of Delaunay triangulation
GPU implementation of Delaunay triangulation
FPGA implementation of Delaunay triangulation
Voronoi diagram
CPU
GPU
FPGA
Language
ISSN
2169-3536
Abstract
Delaunay triangulation is an effective way to build a triangulation of a cloud of points, i.e., a partitioning of the points into simplices (triangles in 2D, tetrahedra in 3D, and so on), such that no two simplices overlap and every point in the set is a vertex of at least one simplex. Such a triangulation has been shown to have several interesting properties in terms of the structure of the simplices it constructs (e.g., maximising the minimum angle of the triangles in the bi-dimensional case) and has several critical applications in the contexts of computer graphics, computational geometry, mobile robotics or indoor localisation, to name a few application domains. This review paper revolves around three main pillars: (I) algorithms, (II) implementations over central processing units (CPUs), graphics processing units (GPUs), and field programmable gate arrays (FPGAs), and (III) applications. Specifically, the paper provides a comprehensive review of the main state-of-the-art algorithmic approaches to compute the Delaunay Triangulation. Subsequently, it delivers a critical review of implementations of Delaunay triangulation over CPUs, GPUs, and FPGAs. Finally, the paper covers a broad and multi-disciplinary range of possible applications of this technique.