학술논문

How to Reduce the Bit-Width of an Ising Model by Adding Auxiliary Spins
Document Type
Periodical
Source
IEEE Transactions on Computers IEEE Trans. Comput. Computers, IEEE Transactions on. 71(1):223-234 Jan, 2022
Subject
Computing and Processing
Annealing
Stationary state
Computational modeling
Optimization
Numerical models
Topology
Semiconductor device modeling
Quantum annealing
annealing machine
bit-width reduction
graph embedding
Ising model
Language
ISSN
0018-9340
1557-9956
2326-3814
Abstract
Annealing machines have been developed as non-von Neumann computers aimed at solving combinatorial optimization problems efficiently. To use annealing machines for solving combinatorial optimization problems, we have to represent the objective function and constraints by an Ising model, which is a theoretical model in statistical physics. Further, it is necessary to transform the Ising model according to the hardware limitations. In the transformation, the process of effectively reducing the bit-widths of coefficients in the Ising model has hardly been studied so far. Thus, when we consider the Ising model with a large bit-width, a naive method, which means right bit-shift, has to be applied. Since it is expected that obtaining highly accurate solutions is difficult by the naive method, it is necessary to construct a method for efficiently reducing the bit-width. This article proposes methods for reducing the bit-widths of interaction and external magnetic field coefficients in the Ising model and proves that the reduction gives theoretically the same ground state of the original Ising model. The experimental evaluations also demonstrate the effectiveness of our proposed methods.