부산대학교 도서관

Convolutional neural network (CNN) is one of the most popular deep learning algorithms for artificial intelligence applications. However, due to its data-intensive workloads, the training of deep CNN is constrained by large memory requirements. Previously, spin transfer torque (STT)-based multilevel cells (MLCs) have been used to implement CNN accelerators to address this issue. However, due to multistep write and read operations, energy, latency, and reliability are critical constraints for larger and deeper training models. This article presents a hybrid STT and differential spin Hall effect (DSHE)-MLC-based data-aware memory design to achieve single-step write and read operations. Depending on the data type, the two-bit data are stored in either STT-MLC or DSHE-MLC memory blocks. The proposed scheme improves the training energy and latency in VGG-16, VGG-19, AlexNet, and LeNet CNN architectures by nearly 50% when compared with conventional STT-MLC-based architectures. Moreover, it also allows for the resolution of device-level write and read reliability issues.