학술논문

First Experimental Demonstration of Negative Capacitance InGaAs MOSFETs With Hf0.5Zr0.5O2 Ferroelectric Gate Stack

Document Type

Conference

Author

Luc, Q. H.; Fan-Chiang, C. C.; Huynh, S. H.; Huang, P.; Do, H. B.; Ha, M. T. H.; Jin, Y. D.; Nguyen, T. A.; Zhang, K. Y.; Wang, H. C.; Lin, Y. K.; Lin, Y. C.; Hu, C.; Iwai, H.; Chang, E. Y.

Source

2018 IEEE Symposium on VLSI Technology VLSI Technology, 2018 IEEE Symposium on. :47-48 Jun, 2018

Subject

Components, Circuits, Devices and Systems
MOSFET circuits
Iron
Annealing
Indium gallium arsenide
Logic gates
MOSFET
Silicon

Language

ISSN

2158-9682

Abstract

We demonstrate, for the first time, the negative capacitance (NC) In 0.53 Ga 0.47 As nMOSFET with 8-nm Hf 0.5 Zr 0.5 O 2 (HZO) as ferroelectric (FE) dielectric for sub-60 mV/dec subthreshold swing (SS). The impact of annealing treatments on the FE properties and electrical characteristics of NC InGaAs nMOSFETs are investigated. Optimized annealing condition results in NC effects at the HZO/Al 2 O 3 /InGaAs nMOSFETs with steep SS property (~ 11 mV/dec).

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