학술논문

Dynamic Gate Drive for SiC Power MOSFETs with Sub-nanosecond Timings
Document Type
Conference
Source
2023 IEEE Applied Power Electronics Conference and Exposition (APEC) Applied Power Electronics Conference and Exposition (APEC), 2023 IEEE. :324-330 Mar, 2023
Subject
Power, Energy and Industry Applications
Insulated gate bipolar transistors
MOSFET
Silicon carbide
Switches
Logic gates
Gate drivers
Timing
SiC MOSFET
dynamic gate driver
segmented gate driver
Language
ISSN
2470-6647
Abstract
A dynamic gate driving strategy is proposed to control the turn-off $\boldsymbol{dV}_{\boldsymbol{DS}}/\boldsymbol{dt}$ transients for SiC power MOSFETs. Compared with a conventional gate driver with fixed gate resistance, dynamic gate drive can effectively suppress the VDS overshoot without a significant reduction in switching speed or increase in turn-off loss. In double pulse testing, using a 40 A, 1200 V SiC power MOSFET, the dynamic gate driver exhibits a 78% reduction in turn-off energy loss $(\boldsymbol{E}_{off})$ when compared to a conventional gate driver for a 35% overshoot. Moreover, it is also found that SiC power MOSFETs require much more stringent timing resolution (< 1 ns) for the dynamic gate driving pattern when compared to Si IGBTs with the similar current and voltage ratings to fine tune $\boldsymbol{dV}_{\boldsymbol{DS}}/\boldsymbol{dt}$. This paper demonstrates and analyzes the advantages of dynamic gate driving for SiC power MOSFETs with precision timing.