학술논문
A 130-nm CMOS Dual Input-Polarity DC–DC Converter for Low-Power Applications
Document Type
Periodical
Author
Source
IEEE Solid-State Circuits Letters IEEE Solid-State Circuits Lett. Solid-State Circuits Letters, IEEE. 2(9):211-214 Sep, 2019
Subject
Language
ISSN
2573-9603
Abstract
This letter presents a dc–dc converter realized in a 130-nm CMOS technology that features the same conversion gain as a standard boost converter, but it is able to process a dual polarity input with a magnitude down to 60 mV. The circuit prototypes feature a regulated output voltage of 1.2 V, an efficiency up to 88% and a maximum output power of 6 mW, while limiting the number of required off-chip components to two capacitors and one inductor.