학술논문
A High-Speed BiCMOS Fully Differential Operational Amplifier with Improved Slew Rate and Phase Margin
Document Type
Conference
Author
Source
2012 International Conference on Computer Science and Electronics Engineering Computer Science and Electronics Engineering (ICCSEE), 2012 International Conference on. 1:652-655 Mar, 2012
Subject
Language
Abstract
A high-gain high-speed fully differential folded-cascade operational amplifier with improved slew rate (SR) is implemented in a 0.6-¥ìm SiGe BiCMOS process. The amplifier can source/sink much larger current than the quiescent current when output voltage is slewing, even with a current reduction in the common-base path. Compared to the CMOS folded-cascode configuration, BiCMOS folded-cascode improves the phase margin. Cadence Spectre simulation shows that the amplifier has an open-loop DC gain of 103 dB, a unit gain bandwidth of 270 MHz and a phase margin of 63 degrees and a slew rate of 1265 V/mu-ìs only consuming 1.6 mA in the main amplifier path, all with 4 pF capacitive loading.