학술논문
3D Simulation Study of Cell-Cell Interference in Advanced NAND Flash Memory
Document Type
Conference
Source
2009 IEEE Workshop on Microelectronics and Electron Devices Microelectronics and Electron Devices, 2009. WMED 2009. IEEE Workshop on. :1-3 Apr, 2009
Subject
Language
ISSN
1947-3834
1947-3842
1947-3842
Abstract
A new Technology CAD (TCAD) methodology has been applied to accurately extract cell-cell interference. The new method uses a "DeltaVt ratio" model instead of the conventional "capacitance ratio" model. The new method will be introduced and validated by recent experimental data. The predictions of the cell-cell interference on sub-40 nm floating gate (FG) cells and charge trapped flash (CTF) cells will be discussed. Finally, the implications and challenges of Multilevel Cell (MLC) applications will be made.