부산대학교 도서관

With the recent dramatic drop in DRAM prices, along with a relentless increase in microprocessor speed, has come an ambitious, do-or-die industry wide transition to 0.25 /spl mu/m technology and soon, 300 mm wafer size. This paper highlights the role of newly developed process equipment capabilities to overcome certain failure mechanisms in 0.25 /spl mu/m enabling device structures such as Shallow Trench Isolation (STI), low RC polysilicide gates, low thermal budget pre-metal dielectrics, high /spl kappa/ storage capacitors, low resistance contact plugs, low capacitance intermetal dielectrics and fine line interconnects.