학술논문
A Heterogeneous SoC for Bluetooth LE in 28nm
Document Type
Conference
Author
Guo, Felicia; Krzysztofowicz, Nayiri; Moreno, Alex; Ni, Jeffrey; Lovell, Daniel; Chi, Yufeng; Ahmad, Kareem; Afshar, Sherwin; Alexander, Josh; Brater, Dylan; Cao, Cheng; Fan, Daniel; Lund, Ryan; Paddock, Jackson; Prechter, Griffin; Sheldon, Troy; Sreedhara, Shreesha; Tsai, Anson; Wu, Eric; Yu, Kerry; Fritchman, Daniel; Pandey, Aviral; Niknejad, Ali; Pister, Kristofer; Nikolic, Borivoje
Source
2023 IEEE Hot Chips 35 Symposium (HCS) Hot Chips 35 Symposium (HCS), 2023 IEEE. :1-11 Aug, 2023
Subject
Language
ISSN
2573-2048
Abstract
OsciBear is a system-on-chip (SoC) featuring a RISC-V 32-bit 5-stage in-order scalar processor, AES accelerator, BLE 1M baseband-modem, and a 2.4 GHz radio front end (RFE) transceiver. It was designed in TSMC's 28nm process with a total die area of 1 mm 2 during the course of a 14-week semester by 18 students - 4 Ph.D students, 6 masters students, and 8 undergraduates - enrolled in UC Berkeley's special topics course “28nm SoC for loT” in Spring 2021. Additionally, a PCB was designed with off-chip reference clocks, bring-up tooling, as well as power amplifiers, RF switch, and an antenna to complete the radio front-end. The CPU has been demonstrated to run up to 30 MHz in typical operating conditions. The BLE 1M-compliant PHY layer packet assembly and disassembly has been verified in-hardware through “loopback” testing. Adherence to BLE's PHY FM specifications has also been verified with a commercial BLE receiver. In total, the chip consumes 8.43 mW of static power.