학술논문

Cumulative Hot-Electron Trapping in GaN-Based Power HEMTs Observed by an Ultrafast (10 V/Ns) On-Wafer Methodology
Document Type
Periodical
Source
IEEE Journal of Emerging and Selected Topics in Power Electronics IEEE J. Emerg. Sel. Topics Power Electron. Emerging and Selected Topics in Power Electronics, IEEE Journal of. 10(5):5019-5026 Oct, 2022
Subject
Power, Energy and Industry Applications
Components, Circuits, Devices and Systems
Switches
Stress
Logic gates
MODFETs
HEMTs
Performance evaluation
Probes
Hard switching
high frequency (100 kHz)
hot electrons (10 V/ns)
p-type GaN high electron mobility transistor (HEMT)
turn-on
Language
ISSN
2168-6777
2168-6785
Abstract
The goal of this article is to advance the understanding of the impact of hard switching on the dynamic performance of GaN-based high electron mobility transistors (HEMTs). To this aim, we developed a fast (10 V/ns) on-wafer system for testing devices in hard switching. The system has been used to study the reliability of several $W_{G}=2$ mm p-type GaN HEMTs with different $L_{\text {GD}}$ or buffer properties. First, we show that by optimizing the drain node capacitance, we can speed up the hard-switching transition to a few ns, even on-wafer level. Second, repeating the experiment by using multiple frequencies, from 1 to 100 kHz, we demonstrate that, in real-world applications, cumulative turn-on stress has a much stronger effect on $R_{\mathrm {ON}}$ compared with OFF-state stress. Third, by comparing the results on identical devices having shorter $L_{\text {GD}}$ , we pinpoint hot electrons as the main mechanism in the device degradation, ruling out the contribution of self-heating. Finally, by comparing three wafers with different processing conditions (different passivation, different buffer), we suggest that trapping phenomena related to hot electrons happen in ns time scale and that the properties of the buffer can significantly impact the dynamic performance of the devices in hard switching.