학술논문
Noise Performance Improvements of 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Non-doped Pixel-FinFETs
Document Type
Conference
Author
Source
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2023 IEEE Symposium on. :1-2 Jun, 2023
Subject
Language
ISSN
2158-9682
Abstract
For the first time, 2-Fin non-doped Pixel-Fin field-effect-transistors are introduced into a 2-Layer Transistor Pixel stacked CMOS image sensor for better noise performance. Thanks to the non-doped channel and wider channel width, a 2.42-time transconductance improvement, 15% random noise and 99.3% random telegraph signal reductions are obtained.