부산대학교 도서관

We present the IDeF-X HDBD integrated circuit, our latest 32-channel application specified integrated circuit devoted to semiconductor photon counting X-ray detectors, designed to read charges ranging from −40 to 40 fC. The chip reaches an equivalent noise charge (ENC) floor of 17 electrons rms and is optimized for low input capacitance (< 10 pF). Each channel is based on an optimized charge sensitive amplifier (CSA) followed by a CR-RC 2 filter and a peak detector with a power consumption of $850 ~\mu \text{W}$ /channel. Gain and shaping times are tunable. This circuit has been designed with radiation mitigation techniques to meet space application requirements. This ASIC can read either cadmium telluride or silicon detectors for imaging-spectroscopy applications. An energy resolution of 230-eV FHWM at 6 keV and a low-level threshold of 1.2 keV were demonstrated with a single pixel silicon drift detector connected to one channel.