학술논문

Reliability Risks Due to Faults Affecting Selectors of ReRAMs and Possible Solutions
Document Type
Periodical
Source
IEEE Transactions on Emerging Topics in Computing IEEE Trans. Emerg. Topics Comput. Emerging Topics in Computing, IEEE Transactions on. 10(4):2086-2091 Jan, 2022
Subject
Computing and Processing
Resistance
Voltage
Random access memory
Reliability
Wires
Transistors
Analytical models
Resistive Memory
ReRAM
crossbar memory arrays
reliability
Language
ISSN
2168-6750
2376-4562
Abstract
Resistive Random Access Memories (ReRAMs) are considered amongst the most promising candidates to replace silicon-based memories in the near future, when huge amount of data have to be stored. However, ReRAMs suffer from reliability issues associated to faults affecting both their resistive elements and their selectors. While some solutions have been presented in literature to detect, or tolerate, faults affecting the resistive element, so far no solution has been yet proposed to detect, or tolerate, faults affecting the selector, albeit these faults have been proven to be likely and possibly compromising the reliability of ReRAMs. In this paper, we analyze the effects of the most likely faults (i.e., shorts and opens) possibly affecting the selectors of ReRAM cells on the operation of the crossbar memory array. We show that a selector failing as a short can give rise to numerous errors on the ReRAM crossbar array. As an example, for the case of a crossbar array of 128x128 cells, we show that a single selector failing as a short may cause up to 64 errors in memory cells sharing the same word line of the cell containing the faulty selector. Such a large number of errors exceeds the correction capability of ECCs usually adopted for ReRAM arrays. Therefore, new solutions enabling to tolerate the large number of errors caused by selector faults in crossbar arrays are needed, to enable the use of this kind of promising memories in a reliable way. We then propose a low-cost approach to detect short faults affecting selectors of ReRAMs and to identify the bitline containing the cell whose selector is faulty. Such a bitline can then be properly deactivated and replaced by a spare one, in order to guarantee the memory correct operation in the field.