학술논문
A transistorless-current-mode static RAM architecture
Document Type
Periodical
Author
Source
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 33(4):669-672 Apr, 1998
Subject
Language
ISSN
0018-9200
1558-173X
1558-173X
Abstract
We propose a static memory architecture in which each bit consists of a single two-terminal device that is bistable in current. Current-mode operation of the memory array removes the need for cell-isolation transistors, thus, allowing huge increases in density over inverter-based SRAM and capacitor-based DRAM. Low power consumption and fast read/write speeds are ensured by taking advantage of the exponential nature of the memory's current-voltage characteristic.