학술논문

Hybrid FeRAM/RRAM Synaptic Circuit Enabling On-Chip Inference and Learning at the Edge

Document Type

Conference

Author

Martemucci, M.; Rummens, F.; Hirtzlin, T.; Martin, S.; Guille, O.; Januel, T.; Carabasse, C.; Billoint, O.; Laguerre, J.; Coignus, J.; Vincent, A. F.; Querlioz, D.; Grenouillet, L.; Saighi, S.; Vianello, E.

Source

2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023

Subject

Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Voltage measurement
Nonvolatile memory
Ferroelectric films
Pulse measurements
Random access memory
Programming
Synapses

Language

ISSN

2156-017X

Abstract

This paper presents an experimental demonstration of a hybrid FeRAM/RRAM synaptic circuit. The circuit incorporates Metal-Ferroelectric-Metal stacks, which exhibit native FeRAM behavior and function as RRAMs after undergoing a forming operation. By leveraging the unique advantages of FeRAMs, such as ultra-low switching energy, in combination with the non-disruptive (infinite) reading capability of RRAMs, this circuit enables efficient on-chip inference and learning at the Edge.

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