부산대학교 도서관

A multifunctional field-effect transistor (FET) for the manufacturing of high-density integrated circuits (ICs) has been developed and fabricated. Furthermore, an extensive numerical device simulation campaign has been carried out in order to characterize the new structure. Such device is a metal–oxide–semiconductor (MOS) FET that simultaneously performs the functions of two traditional FETs (an n-channel MOS and a p-channel MOS), working as one or as the other according to the voltage applied to the gate's terminal. Combinational and sequential circuits employing the new technology introduce, with respect to the standard complementary MOS (CMOS) ones, a drastic reduction of both the required device number and the parasitic capacitances. This leads to a significant increase in the circuit's speed. Furthermore, the ICs obtained with these transistors are fully compatible with the standard CMOS technology and fabrication process.