학술논문

Testing Embedded Toggle Pattern Generation Through On-Chip IR Drop Monitoring
Document Type
Conference
Source
2021 IEEE European Test Symposium (ETS) Test Symposium (ETS), 2021 IEEE European. :1-4 May, 2021
Subject
Components, Circuits, Devices and Systems
Semiconductor device measurement
Regulators
Logic gates
Very large scale integration
System-on-chip
Integrated circuit modeling
Voltage control
Power noise
power integrity
low power testing
background diagnosis
on-chip monitoring
digital circuits
integrated circuits
VLSI circuits
Language
ISSN
1558-1780
Abstract
On-chip monitor (OCM) circuits capture dynamic power-supply (PS) waveforms within power domains individually bounded by dedicated micro voltage regulator modules (µVRMs). This paper uses OCM to diagnose VLSI circuits with a modular power management, where the evolution over time of the gate switching count, in the clock tree, the flip-flops, and the combinational logics are precisely captured in the OCM voltage waveforms. A mismatch between simulation and measurement gives us a warning for either (1) faulty behavior in the IC hardware, or (2) bugs in the test program. In this paper, we demonstrate an IR-drop-based toggle diagnosis technique using OCM for a prototype chip in 180 nm technology. The OCM measurements at 100 ps and 100 µV are capable of reaching a resolution of 18.7 fC/gate. This is approximately equivalent to the amount of charge consumed by a single two-input NAND gate.