학술논문
Modeling and simulation of a validity count flow control mechanism for ATM networks
Document Type
Conference
Author
Source
Proceedings of the 1998 Second IEEE International Caracas Conference on Devices, Circuits and Systems. ICCDCS 98. On the 70th Anniversary of the MOSFET and 50th of the BJT. (Cat. No.98TH8350) Devices, circuits and systems Devices, Circuits and Systems, 1998. Proceedings of the 1998 Second IEEE International Caracas Conference on. :206-210 1998
Subject
Language
Abstract
Flow control is one of the mechanisms employed to prevent and manage congestion in ATM networks. Rate-based flow control and credit-based flow control are the two best known schemes, and are widely implemented in commercially available ATM equipment. None of them entirely satisfies the requirements of flow control for LAN and WAN environments simultaneously, but each one has their key advantages. This situation has originated proposals for integrated rate-credit mechanisms as an alternative for operation in mixed environments. One of these schemes is the validity count, proposed by Ramakrishman (1995), where Resource Management (RM) cells would be employed to convey rate (the circuit transmission rate) and credit (number of cells that can be transmitted at that rate) information. In this work, a validity count flow control mechanism, able to generate and handle credit and rate information, is designed and modeled. Its use in ATM networks was simulated to assess its performance. Interoperability between different kind of switches and a satisfactory use of the links were observed.