학술논문

Design considerations for low-power receiver front-end in high-speed data links
Document Type
Conference
Source
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference Custom Integrated Circuits Conference (CICC), 2013 IEEE. :1-8 Sep, 2013
Subject
Components, Circuits, Devices and Systems
Noise
Capacitance
Sensitivity
Hysteresis
Decision feedback equalizers
Clocks
Electrostatic discharges
Language
ISSN
0886-5930
2152-3630
Abstract
This paper presents different design considerations for the receiver front-end (RXFE) in low-power, high-speed data links. Specifications for the RXFE are defined and explained in detail, including their impact on the overall link performance. Based on these specifications, low-power RXFE topologies are then analyzed to illustrate the design and performance tradeoffs. Techniques to properly characterize and measure the RXFE specifications are also provided, supplemented with measurement results from three different low-power links operating at 10Gb/s, 16Gb/s and 20Gb/s.