학술논문

Strain-Induced Performance Enhancement of Trigate and Omega-Gate Nanowire FETs Scaled Down to 10-nm Width
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 60(2):727-732 Feb, 2013
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Strain
Silicon
MOS devices
Electron mobility
Stress
Performance evaluation
FETs
Carrier mobility
nanowire (NW)
Omega gate
strain relaxation
trigate
Language
ISSN
0018-9383
1557-9646
Abstract
A detailed study of performance in uniaxially strained Si nanowire (NW) transistors fabricated by lateral strain relaxation of biaxial strained-SOI (sSOI) substrate is presented. Two-dimensional strain imaging demonstrates the lateral strain relaxation resulting from nanoscale patterning. An improvement of electron mobility in sSOI NW scaled down to 10-nm width is successfully demonstrated ($+$55 $\%$ with respect to SOI NW) due to remaining uniaxial tensile strain. This improvement is maintained even by using hydrogen annealing to form an Omega gate. For short gate length, a strain-induced $I_{\rm ON}$ gain as high as $+$40$\%$ at $L_{G} = \hbox{45}\ \hbox{nm}$ is achieved for a multiple-NW active pattern.