학술논문

First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 69(4):2101-2107 Apr, 2022
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Logic gates
Transistors
Inverters
Radio frequency
Threshold voltage
Surface treatment
Tin
Complementary field-effect-transistor (CFET)
heterogeneous integration
hybrid complementary metal-oxide-semiconductor (Hybrid CMOS)
indium gallium zinc oxide (IGZO) Radio Frequency Integrated Circuit (RFIC)
oxide semiconductor (OS)
static random access memory (SRAM)
vertically stacked
Language
ISSN
0018-9383
1557-9646
Abstract
In this article, heterogeneous complementary field-effect-transistor (CFET) constructed by vertically stacking amorphous indium gallium zinc oxide (a-IGZO) n-channel on poly-Si p-channel with their own dielectric layer and work function metal gate inverters were demonstrated. Meanwhile, high-frequency IGZO radio frequency (RF) devices with poly-Si as guard ring material simultaneously were fabricated in the same process. High ${f}_{\text {T}}$ and ${f}_{\text {max}}$ IGZO Radio Frequency Integrated Circuits (RFICs) with the excellent on–off ratio need to be promoted by introducing fluorine-based gas. For the IGZO device in CFET, its threshold voltage can be tuned by the adjusted gate for ideal inverter operation at different supply voltage ( ${V}_{\text {DD}}$ ). Moreover, the swing of the IGZO transistor and the gain extracted from voltage transfer characteristic (VTC) curves can also be improved when the controlled gate and adjusted gate are connected as an input terminal, but the ${V}_{\text {TH}}$ tunability for the inverter is satisfied in the meantime. We also simulated 6T-SRAM circuit by SPICE model to further investigate the potential of an adjusted gate for optimizing the noise margin during SRAM operation.