학술논문

Abnormal Degradation Behaviors Under Negative Bias Stress in Flexible p-Channel Low-Temperature Polycrystalline Silicon Thin-Film Transistors After Laser Lift-Off Process
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 70(3):1079-1084 Mar, 2023
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Stress
Thin film transistors
Threshold voltage
Buffer layers
Silicon
Glass
NIST
Flexible LTPS TFT
gate bias stress
laser lift-off process
Young’s modulus
Language
ISSN
0018-9383
1557-9646
Abstract
This work investigates the abnormal phenomena that are observed in electrical characteristics under negative bias stress (NBS) in flexible p-channel low-temperature polycrystalline silicon thin-film transistors (p-channel LTPS TFTs) after TFTs being lifted off from a rigid substrate. During the lift-off process, mechanical strain accumulates in the buffer layer due to the unilateral force, thus resulting in the generation of defects in the buffer layer. Therefore, abnormal degradation behaviors in electrical characteristics of the lifted-off TFTs were observed during negative gate bias stress. A study on physical mechanisms is introduced to describe such abnormal phenomena, and it is confirmed that defects are produced in the buffer layer when the LTPS TFTs are lifted off. In addition, different device dimensions were discussed to support our proposed model. The findings in this work are supported by the discussion of electrical characteristics, trap state extraction, and COMSOL simulation.