학술논문
Degradation Behavior of Etch-Stopper-Layer Structured a-InGaZnO Thin-Film Transistors Under Hot-Carrier Stress and Illumination
Document Type
Periodical
Author
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 68(2):556-559 Feb, 2021
Subject
Language
ISSN
0018-9383
1557-9646
1557-9646
Abstract
Etch-stopper-layer (ESL) structured amorphous InGaZnO thin-film transistors (a-IGZO TFTs) were fabricated in this article. Degradation behavior of the a-IGZO TFTs under hot-carrier stress and illumination (HCIS) was investigated. As HCIS time increases, the transfer curve in the saturation region shifts in the negative direction under the forward-operation mode, whereas it shifts in the positive direction under the reverse-operation mode. The HCIS-induced degradation behavior was attributed to charge trapping in the IGZO/ESL interface. To examine the degradation mechanism, the capacitance–voltage measurements were performed. After applying HCIS, it is found that the gate-to-drain capacitance curve shifts in the positive direction and the gate-to-source capacitance curve exhibits two-stage rises. Technology computer-aided design (TCAD) was used to simulate the electric field distribution during the stress, which also confirmed the proposed mechanism.