학술논문
A Pseudo-Random Number Generator Circuit for Nanoscale Stochastic Computing (SC)
Document Type
Conference
Author
Source
2023 IEEE 23rd International Conference on Nanotechnology (NANO) Nanotechnology (NANO), 2023 IEEE 23rd International Conference on. :299-304 Jul, 2023
Subject
Language
ISSN
1944-9380
Abstract
In most nanoscale stochastic computing designs, the Stochastic Number Generator (SNG) circuit is of primary importance, but it may require considerable area due to its complexity. This paper proposes a new design for pseudo-random number generators (RNGs) to be used in SNGs. The proposed RNG design exploits the randomness between each bit of data to generate larger sets of random numbers by concatenating the modules of the proposed customized linear feedback shift registers (LFSRs). To efficiently generate random data, a plane of RNGs (consisting of multiple modules) is proposed; a so-called sliding window approach is utilized for reading data in both directions; so horizontal and vertical. Therefore, the sets of random numbers are generated by doubling the datasets and inverting the duplicated datasets. Flip-Flops (FFs) are then used to isolate the datasets and reduce the correlation among them. Compared to existing designs found in the technical literature, the proposed nanoscale RNG design offers many advantages such as small area per RNG, low power operation, generated large datasets and higher accuracy.