학술논문

200-nm InGaAs/InP type I DHBT employing a dual-sidewall emitter process demonstrating ƒmax ≫ 800 GHz and ƒτ = 360 GHz
Document Type
Conference
Source
2009 IEEE International Conference on Indium Phosphide & Related Materials Indium Phosphide & Related Materials, 2009. IPRM '09. IEEE International Conference on. :16-19 May, 2009
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Photonics and Electrooptics
Indium gallium arsenide
Indium phosphide
Heterojunction bipolar transistors
Dry etching
Protection
Wet etching
Chromium
Double heterojunction bipolar transistors
Cutoff frequency
Current density
InP heterojunction bipolar transistor
Language
ISSN
1092-8669
Abstract
Type I InP/InGaAs/InP double heterojunction bipolar transistors were fabricated using a simple mesa structure, where emitter junction widths have been scaled from 250 nm to 200 nm. These devices exhibit ƒ max in excess of 800 GHz, and ƒ τ = 360 GHz. Greater than fifty percent device yield was obtained by employing two 25 nm SiN x sidewalls to protect and anchor the refractory metal emitter contact to the emitter semiconductor. A hybrid dry and wet etch process is used to form a vertical emitter mesa, causing reductions in both the emitter-base gap resistance R gap and the spreading resistance beneath the emitter R b,spread , leading to an expected and observed increase in ƒ max . Peak HBT current gains β ≈ 21–33, BV ceo ∼ 4 V, BV cbo ∼ 5 V, and J e at low V cb is over 10 mA/μm 2 .