학술논문
A Method for the Measurement of the Threshold-Voltage Shift of SiC MOSFETs During Power Cycling Tests
Document Type
Periodical
Author
Source
IEEE Transactions on Power Electronics IEEE Trans. Power Electron. Power Electronics, IEEE Transactions on. 36(6):6203-6207 Jun, 2021
Subject
Language
ISSN
0885-8993
1941-0107
1941-0107
Abstract
The application of established test routines like power cycling to wide bandgap devices may be not as straightforward as it seems: When power cycling silicon carbide MOSFETs, the original purpose of triggering package related degradations under application-like and accelerated conditions might be influenced by device related changes during the test, such as carrier trapping, which may lead to a shift in the threshold-voltage $V_{\mathrm{th}}$ and, thus, in the operating point. With the aim to track the $V_{\mathrm{th}}$ shift during power cycling in order to separate the mechanisms—i.e., to indicate and quantify the different overlapping effects—a novel inline $\Delta V_{\mathrm{th}}$ measurement approach is proposed, which can be integrated in existing power cycling test benches with only minor adaptions. First power cycling results with $\Delta V_{\mathrm{th}}$ monitoring reveal a shift in the operating point leading to an early failure detection in conjunction with a $V_{\mathrm{th}}$ shift.