학술논문

A Method for the Measurement of the Threshold-Voltage Shift of SiC MOSFETs During Power Cycling Tests
Document Type
Periodical
Source
IEEE Transactions on Power Electronics IEEE Trans. Power Electron. Power Electronics, IEEE Transactions on. 36(6):6203-6207 Jun, 2021
Subject
Power, Energy and Industry Applications
Aerospace
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
General Topics for Engineers
Nuclear Engineering
Signal Processing and Analysis
Transportation
Silicon carbide
MOSFET
Current measurement
Logic gates
Voltage measurement
Temperature measurement
Power measurement
Bias temperature instability (BTI)
power cycling
SiC MOSFET
V<%2Fitalic>++%24th%24<%2Ftex-math>+<%2Finline-formula>+<%2Fnamed-content>+shift%22">V $th$ shift
reliability
Language
ISSN
0885-8993
1941-0107
Abstract
The application of established test routines like power cycling to wide bandgap devices may be not as straightforward as it seems: When power cycling silicon carbide MOSFETs, the original purpose of triggering package related degradations under application-like and accelerated conditions might be influenced by device related changes during the test, such as carrier trapping, which may lead to a shift in the threshold-voltage $V_{\mathrm{th}}$ and, thus, in the operating point. With the aim to track the $V_{\mathrm{th}}$ shift during power cycling in order to separate the mechanisms—i.e., to indicate and quantify the different overlapping effects—a novel inline $\Delta V_{\mathrm{th}}$ measurement approach is proposed, which can be integrated in existing power cycling test benches with only minor adaptions. First power cycling results with $\Delta V_{\mathrm{th}}$ monitoring reveal a shift in the operating point leading to an early failure detection in conjunction with a $V_{\mathrm{th}}$ shift.