학술논문

Packaging Innovations for High Voltage (HV) GaN Technology
Document Type
Conference
Source
2017 IEEE 67th Electronic Components and Technology Conference (ECTC) ECTC Electronic Components and Technology Conference (ECTC), 2017 IEEE 67th. :1480-1484 May, 2017
Subject
Components, Circuits, Devices and Systems
Gallium nitride
Inductance
Logic gates
Reliability
Field effect transistors
Lead
High voltage
GaN
chip singulation
QFN packaging
mold compound
slotting rules
Language
ISSN
2377-5726
Abstract
Texas Instruments Inc. (TI) has recently announced the introduction of the semiconductor industry's first high voltage (600V), driver-integrated product built around Gallium Nitride (GaN) technology. Integrating the GaN FET with the driver in a single Quad Flat No-Lead (QFN) package required overcoming a number of challenges. The integrated GaN technology enables greater energy efficiency, increased power density and reduced power loss over silicon, thus enabling industrial, enterprise-computing, telecom and renewable-energy systems to operate significantly faster and more efficiently. This paper will discuss the novel packaging solutions implemented for obtaining excellent performance and manufacturability of the product: chip-package co-design, FET-package interaction, and material selection.