학술논문

A high performance modular architecture for hardware implementations of neural and digital applications
Document Type
Conference
Source
Proceedings of the Intelligent Vehicles `92 Symposium Intelligent Vehicles '92 Symposium., Proceedings of the. :63-68 1992
Subject
Transportation
Computing and Processing
Computer architecture
Coprocessors
Large-scale systems
Neural network hardware
Artificial neural networks
Biological neural networks
Parallel processing
Application software
Global communication
Computer aided instruction
Language
Abstract
The modular neural ring (MNR) architecture for hardware implementation of neural networks has been extended to highly parallel vector processing of digital, as well as neural, applications. The distinguishing advantages of modularity and dynamic reconfigurability are maintained in the modular parallel ring (MPR) architecture. Along with the high degree of parallelism achieved, these properties make the MPR architecture well suited to intelligent vehicle applications, where hybrid coprocessing (neural and digital) is essential for high efficiency. The authors present the MPR architecture as an attached hybrid coprocessor to a host computer; the MPR is closely coupled to, and is activated by, the host computer as needed. The MPR coprocessor is easily expandable with modular additions, so that it may equip the host computer with the needed high efficiency neural and vector digital processing facilities. The hardware MPR architecture is programmed through the host computer, and it is dynamically reconfigurable to suit the requirements of the vector digital and neural processing task. The required system and utility software, which will make the MPR coprocessor user friendly, are discussed.ETX