부산대학교 도서관

Semiconductor technology is placing an increased emphasis on emerging materials that can provide ‘More than Moore’ device functionality and advance Si-CMOS capabilities. Graphene combined with ubiquitous Si VLSI technology offers a wide potential for a new portfolio of ‘back end of the line’ (BEOL) devices (Fig. 1) including RF transistors, heat and transparent conductors, sensors, and photonic/plasmonic devices [1-3]. In this work we investigate scalable synthesis of graphene on 100 mm crystallized Cu substrates and the CMOS-compatible fabrication of 26,000 field effect devices. The reduced statistical evaluation reveals average values of Dirac voltage ∼6.2 V, contact resistance −2116 Ω·μm, and mobilities of ∼2113 cm 2 /V-s with about 5% exhibiting mobilities ≥10 4 cm 2 /V-s. We also report the results of scalable direct mechanical delamination of graphene which holds a realistic prospect for wafer scale integration of graphene with Si CMOS substrates.