학술논문
Thermal resistance measurement of packaged SiC MOSFETs by transient dual interface method
Document Type
Conference
Author
Source
2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Physical and Failure Analysis of Integrated Circuits (IPFA), 2017 IEEE 24th International Symposium on the. :1-4 Jul, 2017
Subject
Language
ISSN
1946-1550
Abstract
As we known, the measurement of junction-to-case thermal resistance (R th -JC) of semiconductor power devices is very important. In this paper, an approach of transient dual interface method (TDIM) with gate-source voltage (Vg s ) as the temperature sensitive electrical parameters (TSEP) was investigated for the measurement of R th -JC of packaged SiC MOSFET. The measured R th -JC value of packaged SiC MOSFET is in the range of 1.61 K/W to 1.76 K/W, and compared with the typical value of device specification, the maximum error is 5.29 %. The results show that the thermal resistance measurement of packaged SiC MOSFET by TDIM with Vg s as the TSEP is feasible, and it is of good accuracy and reproducibility.