학술논문

Construction and Application of a Neuromorphic Circuit With Excitatory and Inhibitory Post-Synaptic Conduction Channels Implemented Using Dual-Gate Thin-Film Transistors
Document Type
Periodical
Source
IEEE Transactions on Circuits and Systems I: Regular Papers IEEE Trans. Circuits Syst. I Circuits and Systems I: Regular Papers, IEEE Transactions on. 71(4):1582-1589 Apr, 2024
Subject
Components, Circuits, Devices and Systems
Thin film transistors
Synapses
Artificial neural networks
Logic gates
Electrodes
Capacitors
Modulation
Neuromorphic computing
dual-gate thin-film transistor
post-synaptic current
IGZO
EPSC
IPSC
Language
ISSN
1549-8328
1558-0806
Abstract
Enabled by the availability of both excitatory and inhibitory post-synaptic currents, a biological neural network is inherently capable of implementing more sophisticated non-monotonic classification schemes. While such currents are readily emulated in a software-based artificial neural network using both positive and negative synaptic weighting factors, the same is not as straight forward in a hardware implementation. In this work, two dual-gate thin-film transistors with effectively infinite direct-current input impedance are deployed to construct the excitatory and inhibitory conduction channels of an artificial synapse. The utility of a hardware-based artificial neural network constructed using such synapses is demonstrated by its deployment in the implementation of the complete set of sixteen 2-input binary logic functions exhibiting both monotonic and non-monotonic behavior. The set of weighting factors needed for the implementation of each function are determined using a neuromorphic feed-forward training algorithm based on gradient-descent. While some of the functions can be implemented using the simplest reconfigurable $\mathbf {2\times 1}$ network, all 16 of the functions can be implemented using a deeper, reconfigurable $\mathbf {3\times 2\times 1}$ network.