학술논문
A programmable floating-gate voltage reference in 0.5 /spl mu/m CMOS
Document Type
Conference
Author
Source
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) Custom integrated circuists Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004. :647-650 2004
Subject
Language
Abstract
A floating-gate voltage reference (FGVREF) circuit is presented in which novel implementations of a transconductance amplifier and a transimpedance amplifier are combined to isolate the floating gate from the variations in temperature and power supply that adversely affect most FGVREF circuits. This FGVREF circuit uses this isolation to improve the power supply rejection ratio to greater than 80 dB and temperature coefficient to 54.6 ppm//spl deg/C while maintaining the size, programmability, and CMOS compatibility advantages as compared to typical bandgap references. The programmable FGVREF, which operates from a 2.8 V to 5.5 V supply, dissipates 100 /spl mu/A from a 5 V supply and occupies an area of less than 0.011 mm/sup 2/ in a 0.5 /spl mu/m CMOS process.