학술논문
Through silicon via (TSV) scallop smoothening technique
Document Type
Conference
Author
Source
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th. :676-678 Dec, 2014
Subject
Language
Abstract
To achieve high performance in a small form factor and to overcome Moore Law's by still achieving more transistors on microchips are through 2.5D and 3D chips stacking [1]. Through Si via (TSV) is the key to 2.5 D and 3D technology and is gaining more and more interest from many giant chipmakers [2]. Various defects may form during silicon etch in TSV due to the etching mechanism [3].