학술논문

Design of Totally Self-Checking Sequential Circuits
Document Type
Conference
Source
2009 2nd International Symposium on Logistics and Industrial Informatics Logistics and Industrial Informatics, 2009. LINDI 2009. 2nd International. :1-6 Sep, 2009
Subject
Computing and Processing
Power, Energy and Industry Applications
Sequential circuits
Samarium
Circuit faults
Design methodology
Built-in self-test
Circuit synthesis
Automatic testing
Aerospace safety
Electrical fault detection
Fault detection
Language
ISSN
2156-8790
2156-8804
Abstract
Methods of designing of totally self checking sequential machines are presented in this paper. The main problem in TSC sequential machines (TSC SM) designing is synthesis TSC functional excitation circuit. Formal condition of self testing (ST) property for AND-OR structures are given. New method of circuit minimization is presented and ST of minimized circuits is proofed. We also present a methodology of designing of TSC SM. Owing to our methods we can design TSC circuits in a fully automatic way.