학술논문

Accurate prediction of interconnect capacitance in Self-Aligned Quadruple Patterning
Document Type
Conference
Source
2016 IEEE 20th Workshop on Signal and Power Integrity (SPI) Signal and Power Integrity (SPI), 2016 IEEE 20th Workshop on. :1-4 May, 2016
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Lithography
Layout
Metals
Standards
Parasitic capacitance
Timing
Language
Abstract
This paper proposes a simple yet sufficient interconnect modeling for parasitic capacitance extraction in a Self-Aligned Quadruple Patterning (SAQP) process. The proposed modeling expresses capacitance deviation as uniform sizing to interconnect edges. This model makes the SAQP more attractive compared to the Litho-Etch-Litho-Etch-Litho-Etch (LELELE) type of triple patterning, which includes variability due to mask misalign in principle. We experimentally prove the accuracy using FDM (Finite Difference Method) based simulations of electromagnetic fields. We also show a method to determine the amount of sizing.