학술논문
Characterization and modeling of waffle MOSFETs for high frequency applications
Document Type
Conference
Author
Source
Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004. Solid-state and integrated circuits technology Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on. 1:163-166 vol.1 2004
Subject
Language
Abstract
The high frequency characteristics of waffle MOSFETs are studied. In addition to area saving and reduction of junction capacitance, enhancement on RF characteristics and extra flexibility in the design window are also provided by waffle MOSFETs. The waffle layout has been applied to MOSFETs fabricated using a 0.35-/spl mu/m CMOS bulk technology and compared with those designed with conventional multi-finger layouts. The waffle MOSFET offers about 50% reduction in the gate resistance, 30%-50% enhancement in f/sub max/ and 15% improvement on linearity (IIP3). With the validity of small-signal model demonstrated by the good matching between the model prediction and the measured S-parameter data, it indicates that the waffle MOSFET is capable of offering RF performance improvement with careful design.