학술논문
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC
Document Type
Conference
Author
Marconi, S.; Barbero, M. B.; Fougeron, D.; Godiot, S.; Menouni, M.; Pangaud, P.; Rozanov, A.; Breugnon, P.; Bomben, M.; Calderini, G.; Crescioli, F.; Dortz, O. Le; Marchiori, G.; Dzahini, D.; Rarbi, F. E.; Gaglione, R.; Kruger, H.; Daas, M.; Dieter, Y.; Hemperek, T.; Hugging, F.; Moustakas, K.; Pohl, D.; Rymaszewski, P.; Standke, M.; Vogt, M.; Wang, T.; Wermes, N.; Karagounis, M.; Stiller, A.; Marzocca, C.; Marzocca, G.; De Robertis, G.; Loddo, F.; Licciulli, F.; Andreazza, A.; Liberali, V.; Stabile, A.; Frontini, L.; Bagatin, M.; Bisello, D.; Gerardin, S.; Mattiazzo, S.; Paccagnella, A.; Vogrig, D.; Bonaldo, S.; Bacchetta, N.; Gaioni, L.; De Canio, F.; Manghisoni, M.; Re, V.; Riceputi, E.; Traversi, G.; Ratti, L.; Vacchi, C.; Androsov, K.; Beccherle, R.; Magazzu, G.; Minuti, M.; Morsani, F.; Palla, F.; Poulios, S.; Bilei, G. M.; Menichelli, M.; Placidi, P.; Dellacasa, G.; Demaria, N.; Mazza, G.; Monteil, E.; Pacher, L.; Paterno, A.; Rivetti, A.; Da Rocha Rolo, M. D.; Gajanana, D.; Gromov, V.; van Eijk, B.; Kluit, R.; Vitkovskiy, A.; Benka, T.; Havranek, M.; Janoska, Z.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Kafka, V.; Vrba, V.; Lopez-Morillo, E.; Palomo, F. R.; Munoz, F.; Vila, I.; Jimenez, E. M. S.; Abbaneo, D.; Christiansen, J.; Orfanelli, S.; Jara Casas, L. M.; Conti, E.; Bell, S.; Prydderch, M. L.; Thomas, S.; Christian, D. C.; Deptuch, G.; Fahim, F.; Hoff, J.; Lipton, R.; Liu, T.; Zimmerman, T.; Miryala, S.; Garcia-Sciveres, M.; Gnani, D.; Krieger, A.; Papadopoulou, K.; Heim, T.; Carney, R.; Nachman, B.; Renteira, C.; Wallangen, V.; Hoeferkamp, M.; Seidel, S.
Source
2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC) Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC), 2018 IEEE. :1-4 Nov, 2018
Subject
Language
ISSN
2577-0829
Abstract
The RD53A large scale pixel demonstrator chip has been developed in 65 nm CMOS technology by the RD53 collaboration, in order to face the unprecedented design requirements of the pixel 2 phase upgrades of the CMS and ATLAS experiments at CERN. This prototype chip is designed to demonstrate that a set of challenging specifications can be met, such as: high granularity (small pixels of 50×50 or 25× 100 µm 2 ) and large pixel chip size (~2x2 cm 2 ), high hit rate (3 GHz/cm 2 ), high readout speed, very high radiation levels (500 Mrad - 1 Grad) and operation with serial powering. Furthermore, coping with the long latency of the trigger signal (~12.5 µs), used to select only events of interest in order to achieve sustainable output data rates, requires increased buffering resources in the limited pixel area. The RD53A chip has been fabricated in an engineer run. It integrates a matrix of 400×192 pixels and features various design variations in the analog and digital pixel matrix for testing purposes. This paper presents an overview of the chip architecture and of the methodologies used for efficient design of large complex mixed signal chips for harsh radiation environments. Experimental results obtained from the characterization of the RD53A chip are reported to demonstrate that design objectives have been achieved. Moreover, design improvements and new features being developed in the RD53B framework for final ATLAS and CMS production chips are discussed.