학술논문

Effectiveness of Inorganic Dielectric Layer on Submicron-scale Cu Traces against Thermal Oxidative Stress
Document Type
Conference
Source
2021 IEEE 71st Electronic Components and Technology Conference (ECTC) ECTC Electronic Components and Technology Conference (ECTC), 2021 IEEE 71st. :353-358 Jun, 2021
Subject
Components, Circuits, Devices and Systems
Computers
Thermal resistance
Polyimides
Ions
Oxidation
Dielectrics
Junctions
chiplet
RDL
FOWLP
FOPLP
Cu trace
oxidative stress
Cu2O
maximum junction temperature
Language
ISSN
2377-5726
Abstract
Scaling-down of Cu traces in redistribution layers is increasingly required to achieve high-bandwidth signal processing in high-power multi-chiplet systems consisting of multicore CPUs and GPUs. The signal integrity of a scaled-down Cu trace, however, is degraded in the high-temperature environment created by operation of a multi-chiplet system since oxidation of a Cu trace increases its electrical resistance. We investigated the oxidation behavior of submicron-scale Cu traces fabricated using a semi-additive process. When the Cu traces were directly covered with a polyimide dielectric, the conventional covering, they were seriously oxidized by thermal oxidative stressing. In contrast, when they were covered with thin inorganic dielectrics (100 nm), they had much higher resistance against thermal oxidative stressing. The lifetime of these submicron-scale Cu traces under the assumed operating temperature of a multi-chiplet system was estimated to be more than 10 years for $0.8-\mu \mathrm{m}$-wide Cu traces, which is twice the expected operating lifetime of high-performance computers. The covering of thin inorganic dielectrics results in high signal integrity, enabling high-bandwidth signal processing in multi-chiplet systems.