학술논문

Comprehensive design optimization for 2.133 Gbps LPDDR3 extension for mobile platform system
Document Type
Conference
Source
2014 IEEE 64th Electronic Components and Technology Conference (ECTC) Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th. :2075-2080 May, 2014
Subject
Components, Circuits, Devices and Systems
Photonics and Electrooptics
Clocks
Capacitors
Design optimization
Mobile communication
Jitter
Capacitance
Language
ISSN
0569-5503
2377-5726
Abstract
Recent fast-evolving mobile system demands high bandwidth and low power consumption, necessitating extension of LPDDR3 beyond 1.6 Gbps. This demand, however, brings significant technical challenges from the perspective of signal and power integrity. A simple way of mitigating signal integrity issue at the challenging speed is to use ODT (On-Die Termination). Since ODT significantly increase power consumption, the use of ODT is not an attractive solution in a mobile system which considers low power consumption as primary metric. Thus, comprehensive design optimization with given design constraint is a practical solution which can avoid penalty of power consumption in the mobile system. In this paper, we have demonstrated design success of stretched LPDDR3 up to 2.133Gbps by applying rigorous design optimization based on comprehensive PI-aware SI analysis. It includes signal quality improvement and power delivery optimization. The Both metrics are organically considered during optimization process to achieve successful system operation up to 2.133Gbps without additional power consumption by ODT use.