학술논문

Error Resilient Secure Multi-gigabit Optical Link Design for High Energy Physics Experiment
Document Type
Conference
Source
2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID), 2016 29th International Conference on. :427-432 Jan, 2016
Subject
Components, Circuits, Devices and Systems
Encryption
Forward error correction
Ciphers
Clocks
Encoding
Arrays
Physics
High Energy Physics
Multi-Gigabit Optical Link
Error Resilient Secure Link
AES
Golay Coding
Helical Interleaver
Latency Optimized Gearbox
High Speed Communication
Language
ISSN
2380-6923
Abstract
This paper presents a novel design for single channel error resilient secured multi-gigabit optical link for High-Energy Physics (HEP) experiment. The work discusses the logic core implemented on the latest Altera high performance Arria10 FPGA board, having 20nm chip technology. A novel data communication scheme is proposed for this HEP experiment that preserves the DC-balance of the line and allows forward error correction (FEC) with encryption. It is implemented through concatenated blocks of Scrambler, Golay triple error correction coder, AES (Advanced Encryption Standard) cipher and Helical Interleaver. The link operates at a frequency of 8.192 Gbps. Novelty of our design is justified through the performance measurement of the minipod-optical transmitters/receivers.