학술논문
Differential Analog Layout for Improved ASET Tolerance
Document Type
Periodical
Author
Source
IEEE Transactions on Nuclear Science IEEE Trans. Nucl. Sci. Nuclear Science, IEEE Transactions on. 54(6):2053-2059 Dec, 2007
Subject
Language
ISSN
0018-9499
1558-1578
1558-1578
Abstract
Single-event transients (SETs) affecting a single side of a differential data path have been shown to cause signal degradation and data loss. A radiation hardened by design (RHBD) transistor layout technique is demonstrated that promotes charge collection on both sides of the differential data path. The induced common-mode error voltage is suppressed by the differential circuit, significantly reducing the SET amplitude.