학술논문

Development of compression molding process for Fan-Out wafer level packaging
Document Type
Conference
Source
2020 IEEE 70th Electronic Components and Technology Conference (ECTC) Electronic Components and Technology Conference (ECTC), 2020 IEEE 70th. :1965-1972 Jun, 2020
Subject
Components, Circuits, Devices and Systems
Electromagnetic compatibility
Liquids
Compression molding
Temperature measurement
Delays
Silicon
Filling
Component
Fan-out wafer level packaging
Epoxy molding compounds
wafer level warpage
Language
ISSN
2377-5726
Abstract
The present study deals with the investigation of compression mold processes and materials to enable a highdensity chip-first multi-die Fan-Out assembly. Wafer warpage, die shift and mold filling are investigated on 300mm wafers using various Epoxy Mold Compounds (EMC) with a target mold cap thickness of 200μm. Compression molding steps are first conducted on bare silicon, secondly on wafers coated with Temporary Bonding Material (TBM) and finally with populated dies on the TBM. The impact of TBM, and EMC materials along with Post-Mold-Cure (PMC) profiles have been explored in order to optimize the wafer warpage. The combination of the optimum material and process enabled ultra-low bow values below 200μm on 300mm silicon wafers. In addition, the ability for mold materials to fill narrow gaps specifics to Fan-out assemblies was also addressed. Furthermore, factors such as the die density and mold material distribution impact on die shift are also discussed.