학술논문

Field Effect Depletion Regions exploiting different Qox polarities for Interface Passivation in High-Resistivity Silicon Substrates
Document Type
Conference
Source
2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT) Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), 2023 International VLSI Symposium on. :1-2 Apr, 2023
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Power, Energy and Industry Applications
Signal Processing and Analysis
Surface waves
Conductivity
Very large scale integration
Silicon
Dielectrics
Coplanar waveguides
Quality of experience
Language
Abstract
We report on a novel technique for localized interface passivation in High-Resistivity (HR) silicon-based substrates. Called Field Effect Depletion Regions (FEDR), it relies on alternating dielectrics with fixed charge densities of different signs Q ox, pos and Q ox, neg near the substrate interface to passivate the Parasitic Surface Conduction (PSC). TCAD simulations based on a Coplanar Waveguide (CPW) structure on FEDR-passivated HR substrates describe the substrate response against fixed charge density, pattern pitch and DC bias variations. It is shown that in the best cases, FEDR enables maintaining roughly one order of magnitude improvement on the substrate effective resistivity versus unpassivated HR up to $100 GHz \rho_{\text{eff}}\sim 1\ \mathrm{k}\Omega\ \text{cm}$. Moreover, this work provides some guidelines on finding the best pattern periodicity while respecting technology constraints.