학술논문

Bidirectional ESD Protection Device Using PNP With pMOS-Controlled Nwell Bias
Document Type
Periodical
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 39(3):331-334 Mar, 2018
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Electrostatic discharges
Junctions
Logic gates
Leakage currents
Substrates
MOS devices
Pins
Dual-direction
bidirectional
PNP
electrostatic discharge (ESD)
latch-up immunity
transmission line pulse (TLP)
Language
ISSN
0741-3106
1558-0563
Abstract
We demonstrate a PNP-based bidirectional ESD protection device with base bias controlled by two pMOS transistors, realized in a 0.18- $\mu \text{m}$ CMOS process for 5–7 V applications. With respect to the conventional floating-base PNP device, very similar ESD performance is achieved. Due to the presence of extra parasitic diodes, the dc breakdown ( ${V}_{\text {BD}}$ ) and holding ( ${V}_{H}$ ) voltages are extended up to 8.0 and 7.6 V at 150 °C, respectively. Only a very limited area increase is needed and no extra mask is required for this implementation.