학술논문

Theory and Implementation of a Load-Mismatch Protective Class-E PA System
Document Type
Periodical
Source
IEEE Transactions on Circuits and Systems I: Regular Papers IEEE Trans. Circuits Syst. I Circuits and Systems I: Regular Papers, IEEE Transactions on. 67(2):369-377 Feb, 2020
Subject
Components, Circuits, Devices and Systems
Switches
Logic gates
Zero voltage switching
Electric breakdown
Degradation
Power generation
CMOS integrated circuits
load mismatch
VSWR
power amplifiers (PAs)
class-E PA
self-healing
self-protecting
Language
ISSN
1549-8328
1558-0806
Abstract
Highly efficient switch-mode class-E power amplifiers (PAs) are sensitive to load impedance variations. For voltage standing wave ratios (VSWRs) up to 10:1, the peak switch voltage and the average switch current can increase by a factor of 1.7 and 2.5, respectively, relative to those under nominal load conditions, imposing serious reliability risks. This paper describes a technique to self-protect class-E PAs to decrease their sensitivity to load variations, relying on the tuning of the switch-tank relative-resonance frequency, implemented by an on-chip switched-capacitor bank (SCB). To validate the technique, load-pull measurements are conducted on a class-E PA implemented in a standard 65-nm CMOS technology, employing an off-chip matching network, augmented with a fully automated self-protective control loop. Under nominal conditions, the PA provides 17.8 dBm at 1.4 GHz into $50\,{\Omega }$ from a 1.2-V supply with 67% efficiency. The proposed self-protective PA can reduce its peak switch voltage below the technology- and switch design-related limit for any load with a VSWR up to 19:1 while not considerably impacting output power and efficiency, which see a maximum degradation of 1.6 dB and 6%, respectively. Furthermore, a class-E PA designed to safely handle $2.5{\times }$ the nominal average switch current can reliably operate for VSWRs up to 19:1 when protected with our technique.