학술논문
21.4 A -108dBc THD+N, 2.3mW Class-H Headphone Amplifier with Power-Aware SIMO Supply Modulator
Document Type
Conference
Author
Source
2024 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2024 IEEE International. 67:384-386 Feb, 2024
Subject
Language
ISSN
2376-8606
Abstract
Class-G/H amplifiers are becoming popular in modern mobile devices with diverse communication systems for their high efficiency and low EMI [1–4]. However, three design issues that arise for high-fidelity Class-G/H amplifiers are: 1) Inaccurate envelope tracking limiting achievable full-path efficiency [1–3]; 2) THD+N degradation due to limited PSRR in output drivers; and 3) Distortions at high temperature arising from the DAC reference bias drift caused by a high gate leakage in the advanced process [5]. In the first issue, to achieve high full-path efficiency, a supply modulator needs to efficiently generate precise positive and negative envelope-tracking supplies for ground-referenced audio outputs. Compared to the conventional Buck-NCP (negative charge-pump) cascade topology [1], which has limited efficiency for the negative supply due to the two-stage conversion, the single-stage multi-level charge-pump in [2, 3] could generate both supplies more efficiently. However, the more than 1A of input peak current (I peak ) might cause serious electromigration and supply bouncing issues, restricting the envelope-tracking bandwidth [3]. In [2], the tracking bandwidth is 16Hz, thus limiting the full-path efficiency to 23.5% at 10mW output (1kHz). Additionally, the common constant ON-time (T ON ) discontinuous conduction mode (DCM) control scheme for buck converters can only optimize the efficiency in a narrow output voltage range, not suitable for wide-range supplies [6]. Second, the signal-dependent supply ripple at the high-frequency audio band might degrade THD+N seriously if the driver’s PSRR is not sufficient, for which a higher CMFB loop gain is required [7]. However, such design might compromise the amplifier stability. Lastly, the gate leakage might cause serious reference bias drift and generate I P /I N mismatch in a tri-level DAC. In [5], the gate-leakage-compensated off-transistor-based bias noise filter is introduced to reduce the impact. However, if the resistance of an off-transistor is too large, the increased gate leakage at high temperature might saturate the compensation amplifier, leading to severe distortions. To solve the aforementioned issues: 1) a single-stage inductor-based supply modulator is introduced to relieve I peak and then efficiently generate the fast envelope tracking at more than 1kHz, and a power-aware T ON control scheme is leveraged to enhance the envelope-tracking accuracy for all output power levels as well, thus improving the efficiency to 34.8% at 10mW output (1kHz); 2) A gain-boosting CMFB circuit with a new frequency compensation scheme is presented to enhance the loop gain without sacrificing the amplifier stability; 3) An R OFF -controlled technique is employed in the noise filter design to address the DAC reference bias drift and maintain the THD+N up to 85°C. Combining -these techniques, the Class-H amplifier achieves -108dBc THD+N, 126dB DR, and 2.3mW quiescent power.