부산대학교 도서관

In this paper, we propose a digital-to-time conversion (DTC) technique operating entirely in the sinusiodal waveform voltage domain of a crystal oscillator (XO) before the signal's final slicing into the time-domain of the programmably delayed clock, with a deterministic predistortion to further improve the linearity. Precise timing delay is obtained by simply adjusting the dc offset of the sine signal. The technique merges the functionality of DTC with XO generation, thus drastically reducing the power consumption, while offering wide range with fine resolution, low noise and high linearity. Fabricated in 22-nm FD-SOI CMOS, the prototype of XO+DTC consumes only 0.52 mW while achieving a 546 ps range with fine resolution of 266 fs. The rms jitter is only 86.6 fs at a frequency of 100 MHz.