학술논문

Electrical Characterization Methodology for Raw Cable up to 30 GHz
Document Type
Conference
Source
2019 Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility (EMC Sapporo/APEMC) Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility (EMC Sapporo/APEMC), 2019 Joint International Symposium on. :179-182 Jun, 2019
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Fields, Waves and Electromagnetics
General Topics for Engineers
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Transportation
Fixtures
Metrology
Insertion loss
Coaxial cables
Testing
Cable insulation
Calibration
cable
insertion loss
electrical characterization
impedance mismatch
de-embedding
test fixture
gauge
Language
Abstract
Channel loss is a dominant factor for the signaling performance of high-speed I/O's. Some platform design guides clearly specify the raw cable only loss requirement in the channel design. How to characterize the raw cable with the test fixture being de-embedded is very important for designers to select the right cable and control manufacture process control, balancing the platform performance and cost. In this study, a novel raw cable metrology is proposed for accurate and robust measurement. Delta-L de-embedding metrology is adopted with the physical fitting to report insertion loss numbers more error-resistant up to 30 GHz. The unit cable loss of different effective cable length configurations by Delta-L are very consistent to show the robustness and accuracy of this proposed metrology. Furthermore, this electrical library of different cable gauges from different suppliers was established to provide more flexibility in the cable selection during the platform design phase.